Design and analysis of high speed capacitive pipeline DACs

Design and Analysis of High Speed Capacitive Pipeline DACs

Design of a high speed capacitive digital-to-analog converter (SC DAC) is presented for 65 nm CMOS technology. SC pipeline architecture is used followed by an output driver. For GHz frequency operation with output voltage swing suitable for wireless applications (300 mVpp) the DAC performance is shown to be limited by the clock feed-through and settling effects in the SC array rather than by th...

High-Speed DACs

6 HIGH SPEED DACs AND DDS SYSTEMS

A frequency synthesizer generates multiple frequencies from one or more frequency references. These devices have been used for decades, especially in communications systems. Many are based upon switching and mixing frequency outputs from a bank of crystal oscillators. Others have been based upon well understood techniques utilizing phase-locked loops (PLLs). This mature technology is illustrate...

New design criterion for high-order DACs

Stability analysis of high-order delta-sigma loops is a challenge. In this work, a novel design criterion is presented for error-feedback DACs which are especially suitable for high-speed operation. This criterion allows the design of unconditionally stable, robust, high-order delta-sigma DACs. Both analytical and numerical analysis are performed for verification. Total Pages (including 2 docum...

Design of Novel High Sensitive MEMS Capacitive Fingerprint Sensor

In this paper a new design of MEMS capacitive fingerprint sensors is presented. The capacitive sensor is made of two parallel plates with air gap. In these sensors, the capacitance changes is very important factor. It is caused by deformation of the upper electrode of sensor. In this study with making slots in upper electrode, using T-shaped protrusion on diaphragm in order to concentrate the f...